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Computer Processing Architecture

Tech ID:
Principal Investigator:
David Whalley
Licensing Manager:
  • 62/738,454

Micro-architecture designs and methods for computer processing architecture, including an instruction cache for storing producer instructions, a half-instruction

cache for storing half instructions, and eager shelves for storing a result of a first producer instruction. The computer processing architecture may fetch the first producer instruction and a first half instruction; send the first half instruction to the eager shelves; based on execution of the first producer instruction, send a second half instruction to the eager shelves; assemble the first producer instruction in the eager shelves based on the first half instruction and the second half instruction; and dispatch the first producer instruction for execution.